A DIGITAL CONVERTER in touch with your emotions

Multibit synchronous DAC with vintage PCM56

Part two

SPDIF INPUT.jpg
CS8412.jpg

The popular Crystal CS8412 chip receiver is a digital audio interface which recovers the timing information from a SPDIF source and locks the embedded PLL/VCO (Voltage Controlled Oscillator) to the incoming clock.

 

LTC1050/LTC1052 op-amp are a chopper (or auto zero) CMOS amplifier (from Analog Devices) that exhibits precise outputs and low frequency input noise voltage in the low-kilohertz bandwidth. These kinds of op-amps are usually designed for applications that require high output accuracy due to small differential voltages. They have high CMRR (output less susceptible to variation in the common mode voltage), high PSRR (output less susceptible to variation in the supply), high open loop gain (better closed loop gain accuracy), and low drift over temperature and time (output is an accurate representation of the input signal over time and over temperature). LTC1052, unusually but successfully, is used here in a low-pass filter (LPF) configuration on the internal PLL (Phase Locked Loop) board, useful to achieve an overall higher-order jitter suppression.

 

 

 

Measurement of the "jitter rejection" of The 51st Anniversary DAC, connected to a Spdif 75ohm coax cable. I don’t have any professional equipment to measure jitter. All I have is a PC soundcard that I could use with a free spectrum analysis tool.

 

This test is a 44.1 kHz/16 bit stereo version of the J-Test signal developed by Julian Dunn, published by the Audio Engineering Society. This is a “torture test” to stimulate worst case levels of data and sampling jitter due to high frequency loss in cabling and a poor clocking in the DAC.

J-Test signal has two components. The fundamental is a sine wave with a period of 4 samples (44.1kHz/4=11.025KHz). This is added to a square wave of amplitude of one bit (the lowest) repeated at an integer fraction of 44.1kHz, toggled in a way that produces strong jitter spectral components at the repetition rate and its odd harmonics.

 

The spread of the basis of the fundamental tone at 11.025KHz and the amount and relative amplitude of the lateral bands are proportional to the level of the jitter distortion which is added.

If the total sum of all the jitter components is less than –100dB within the audio band, we can safely assume that the jitter will be inaudible. In green the “limit guide line” with individual components being under –110dB, with a –100dB limit close to the fundamental test signal.

 

The 51st Anniversary DAC under test shows a narrow fundamental tone spectrum with sidebands well below the “green line”: this proves the correct and good job of the local PLL clock board in reshaping and recovering all the edges of the digital signals running inside the machine.

 

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